Thin film transistors (TFTs) are a type of field effect transistors (hereinafter referred to as FETs). TFTs are three-terminal elements having a gate terminal, a source terminal, and a drain terminal in the basic structure. TFTs are active elements having a function of switching the current between the source terminal and the drain terminal so that a semiconductor thin film deposited on a substrate is used as a channel layer in which electrons or holes move and a voltage is applied to the gate terminal to control the current flowing in the channel layer. TFTs are electronic devices that are most widely used these days in practical application. Typical applications of TFTs include liquid-crystal driving elements.
Currently, most widely used TFTs are metal-insulator-semiconductor-FETs (MIS-FETs) in which a polycrystalline silicon film or an amorphous silicon film is used as a channel layer material. MIS-FETs including silicon are opaque to visible light and thus fail to form transparent circuits. Therefore, when MIS-FETs are used as switching elements for driving liquid crystals in liquid crystal displays, the aperture ratio of a display pixel in the devices is small.
Due to the recent need for high-resolution liquid crystals, switching elements for driving liquid crystals now require high-speed driving. In order to achieve high-speed driving, a semiconductor thin film in which the mobility of electrons or holes as carriers, is higher than that in at least amorphous silicon needs to be used as a channel layer.
Under such circumstances, Patent Document 1 proposes a transparent semi-insulating amorphous oxide thin film which is a transparent amorphous oxide thin film deposited by vapor deposition and containing elements of In, Ga, Zn, and O. The composition of the oxide is InGaO3(ZnO)m (m is a natural number less than 6) when the oxide is crystallized. The transparent semi-insulating amorphous oxide thin film is a semi-insulating thin film having a carrier mobility (also referred to as carrier electron mobility) of more than 1 cm2 V−1sec−1 and a carrier density (also referred to as carrier electron density) of 1016 cm−3 or less without doping with an impurity ion.
However, as proposed in Patent Document 1, it is pointed out that the transparent amorphous oxide thin film (a-IGZO film) containing elements of In, Ga, Zn, and O and deposited by any method of vapor deposition selected from sputtering and pulsed laser deposition has a carrier mobility in a range of about 1 cm2 V−1 sec−1 or more to 10 cm2 V−1 sec−1 or less, and carrier mobility with respect to higher resolution of a device is not sufficient.
Patent Document 2 discloses a sputtering target for forming the amorphous oxide thin film described in Patent Document 1, that is, a sputtering target that is a sintered body target containing at least In, Zn, and Ga. The composition thereof contains In, Zn, and Ga, the relative density is 75% or more, and the resistance value ρ is 50 Ω cm or less. However, since the target of Patent Document 2 is a polycrystalline oxide sintered body having a homologous phase crystal structure, the amorphous oxide thin film obtained from the polycrystalline oxide sintered body has a carrier mobility of only about 10 cm2 V−1 sec−1, similarly to Patent Document 1.
Regarding materials for realizing high carrier mobility, Patent Document 3 proposes a thin film transistor including an oxide thin film in which gallium is dissolved in indium oxide. In the oxide thin film, the Ga/(Ga+In) atomic ratio is 0.001 or more and 0.12 or less, and the percentage of indium and gallium with respect to the total metal atoms is 80 at % or more. The oxide thin film has an In2O3 bixbyite structure. An oxide sintered body is proposed as the material of the oxide thin film in which gallium is dissolved in indium oxide. In the oxide sintered body, the Ga/(Ga+In) atomic ratio is 0.001 or more and 0.12 or less, and the percentage of indium and gallium with respect to the total metal atoms is 80 at % or more. The oxide sintered body has an In2O3 bixbyite structure.
However, when the crystalline oxide semiconductor thin film as proposed in Patent Document 3 is applied to TFTs, a problem arises in the variation of TFT characteristics caused by the crystal grain boundary. In particular, it is extremely difficult to uniformly form a TFT on a large-sized glass substrate of the eighth generation or later.
Patent Document 4 describes an oxide sintered body having a bixbyite structure and containing indium oxide, gallium oxide, and positive trivalent and/or positive tetravalent metal. In the sintered body, the content of positive trivalent and/or positive tetravalent metal is 100 ppm or more and 10,000 ppm or less and the composition amount of indium (In) and gallium (Ga) is in the composition range satisfying the formula: 0.005<In/(In+Ga)<0.15 in atomic percent. In the TFT evaluation, Example having high mobility of about 60 cm2 V−1 sec−1 is disclosed.
However, an oxide semiconductor thin film obtained by the sintered body of Patent Document 4 has a problem in that microcrystals or the like are likely to be generated, and particularly, it is difficult to form a TFT having a favorable yield ratio on a large-sized glass substrate. In the production process of a thin film transistor of an oxide semiconductor, generally, an amorphous film is formed once and then an amorphous or crystalline oxide semiconductor thin film is obtained by subjecting the amorphous film to an annealing treatment. Wet etching with weak acid of an aqueous solution or the like containing oxalic acid, hydrochloric acid, or the like is carried out in order to perform the patterning processing to create a desired channel layer after the amorphous film forming process. However, when an oxide sintered body substantially composed of only a bixbyite structure of Patent Document 4 is used, the crystallization temperature of the amorphous film to be formed is decreased. Thus, a problem arises in that microcrystals are already generated at the subsequent stage after the film deposition to generate residues in the etching process or crystallization partially proceeds so that etching cannot be performed. That is, a problem arises in that the desired TFT channel layer is difficult to pattern and form by a wet etching method using a photolithographic technique or the like, or even if a TFT can be formed, the TFT is not stably operated.    Patent Document 1: Japanese Unexamined Patent Application, Publication No. 2010-219538    Patent Document 2: Japanese Unexamined Patent Application, Publication No. 2007-073312    Patent Document 3: PCT International Publication No. WO2010/032422    Patent Document 4: PCT International Publication No. WO2011/152048